CPU&PC
IPFS
- The assembly programmer can set the value of the PC by specifying the address of the instruction to be executed. Such as transfer instructions, subroutine call instructions, etc.
- The controller consists of a program counter (PC), an instruction register (IR), a memory address register (MAR), a memory data register (MDR), an instruction decoder, a sequential circuit and a micro-operation signal generator.
- The program status word register is an integral part of the arithmetic unit.
- The condition under which the conditional branch instruction is executed comes from the flags register.
- n of n-bit CPU refers to the number of data bus lines.
- Among the registers of the CPU, the instruction register is transparent to the user.
- In the instruction cycle of an unconditional jump instruction, the value of PC is modified twice. After the instruction fetch cycle, the value of the PC is incremented by 1; during the execution cycle, the value of the PC is modified to the jump target address. So revised twice.
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